1;3409;0c Towards Efficient Multi-Level Threading of H.264 Encoder on Intel Hyper-Threading Architectures

Towards Efficient Multi-Level Threading of H.264 Encoder on Intel Hyper-Threading Architectures

18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
DOI: 10.1109/IPDPS.2004.1302990

IPDPS

bibtex

Exploiting thread-level parallelism is a promising way to improve the performance of multimedia applications that are running on multithreading general-purpose processors.This paper describes the work in developing our threaded H.264 encoder. We parallelize the H.264 encoder using the OpenMP programming model, which allows us to leverage the advanced compiler technologies in the Intel C++® compiler for Intel Hyper-Threading architectures. After we present our design considerations in the parallelization process, we describe two efficient methods for multi-level data partitioning, which can improve the performance of our multithreaded H.264 encoder. Furthermore, we exploit different options in the OpenMP programming. While one implementation that uses the task queuing model is slightly slower than the other implementation, it is easier to be read than the other one. The results have shown good speedups ranging from 3.74x to 4.53x over the well-optimized sequential code performance on a system of 4 Intel Xeon™ processors with Hyper-Threading Technology.