Dennis Abts
Google Inc., Madison, USA
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Flattened butterfly: a cost-efficient topology for high-radix networks
ACM SIGARCH Computer Architecture News, vol. 35,no. 2,2007 – CAN
Increasing integrated-circuit pin bandwidth has motivateda corresponding increase in the degree or radix of interconnection networksand their routers. This paper introduces the flattened butterfly, a cost-efficient topology for high-radix networks. ...
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The BlackWidow High-Radix Clos Network
ACM SIGARCH Computer Architecture News, vol. 34,no. 2,2006 – CAN
This paper describes the radix-64 folded-Clos network of the Cray BlackWidow scalable vector multiprocessor. We describe the BlackWidow network which scales to 32K processors with a worstcase diameter of seven hops, and the underlying high-radix ...
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Technology-Driven, Highly-Scalable Dragonfly Topology
ACM SIGARCH Computer Architecture News, vol. 36,no. 3,2008 – CAN
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. ...
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The BlackWidow High-Radix Clos Network
33rd annual international symposium on Computer Architecture, 2006 – ISCA
This paper describes the radix-64 folded-Clos network of the Cray BlackWidow scalable vector multiprocessor. We describe the BlackWidow network which scales to 32K processors with a worstcase diameter of seven hops, and the underlying high-radix ...
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Energy proportional datacenter networks
37th International Symposium on Computer Architecture (ISCA 2010), 2010 – ISCA
Numerous studies have shown that datacenter computers rarely operate at full utilization, leading to a number of proposals for creating servers that are energy proportional with respect to the computation that they are performing.
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Adaptive routing in high-radix clos network
2006 ACM/IEEE conference on Supercomputing, 2006 – ICS
Recent increases in the pin bandwidth of integratedcircuits has motivated an increase in the degree or radix of interconnection network routers. The folded-Clos network can take advantage of these high-radix routers and this paper investigates ...
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Flattened butterfly: a cost-efficient topology for high-radix networks
34th International Symposium on Computer Architecture (ISCA 2007), 2007 – ISCA
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Achieving predictable performance through better memory controller placement in many-core CMPs
ACM SIGARCH Computer Architecture News, vol. 37,no. 3,2009 – CAN
In the near term, Moore's law will continue to provide an increasing number of transistors and therefore an increasing number of on-chip cores. Limited pin bandwidth prevents the integration of a large number of memory controllers on-chip. With many ...
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The Cray BlackWidow: a highly scalable vector multiprocessor
2007 ACM/IEEE Conference on Supercomputing, 2007 – SC
This paper describes the system architecture of the Cray BlackWidow scalable vector multiprocessor. The BlackWidow system is a distributed shared memory (DSM) architecture that is scalable to 32K processors, each with a 4-way dispatch scalar ...
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Technology-Driven, Highly-Scalable Dragonfly Topology
35th International Symposium on Computer Architecture (ISCA 2008), 2008 – ISCA
Evolving technology and increasing pin-bandwidth motivate the use of high-radix routers to reduce the diameter, latency, and cost of interconnection networks. High-radix networks, however, require longer cables than their low-radix counterparts. ...
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