Jaswinder Pal Singh
Princeton University, Princeton, NJ, USA
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The SPLASH-2 programs: characterization and methodological considerations
ACM SIGARCH Computer Architecture News, vol. 23,no. 2,1995 – CAN
The SPLASH-2 suite of parallel applications has recently been released to facilitate the study of centralized and distributed shared-address-space multiprocessors. In this context, this paper has two goals. One is to quantitatively characterize the ...
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The SPLASH-2 Programs: Characterization and Methodological Considerations
22nd annual international symposium on Computer architecture, 1995 – ISCA
The SPLASH-2 suite of parallel applications has recently been released to facilitate the study of centralized and distributed shared-address-space multiprocessors. In this context, this paper has two goals. One is to quantitatively characterize the ...
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SPLASH: Stanford parallel applications for shared-memory
ACM SIGARCH Computer Architecture News, vol. 20,no. 1,1992 – CAN
We present the Stanford Parallel Applications for Shared-Memory (SPLASH), a set of parallel applications for use in the design and evaluation of shared-memory multiprocessing systems. Our goal is to provide a suite of realistic applications that will ...
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The PARSEC benchmark suite: characterization and architectural implications
17th International Conference on Parallel Architecture and Compilation Techniques (PACT 2008), 2008 – PACT
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Previous available benchmarks for multiprocessors have focused on ...
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Working sets, cache sizes, and node granularity issues for large-scale multiprocessors
ACM SIGARCH Computer Architecture News, vol. 21,no. 2,1993 – CAN
The distribution of resources among processors, memory and caches is a crucial question faced by designers of large-scale parallel machines. If a machine is to solve problems with a certain data set size, should it be built with a large number of ...
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The performance impact of flexibility in the Stanford FLASH multiprocessor
ACM SIGOPS Operating Systems Review, vol. 28,no. 5,1994 – SIGOPS
A flexible communication mechanism is a desirable feature in multiprocessors because it allows support for multiple communication protocols, expands performance monitoring capabilities, and leads to a simpler design and debug process. In the Stanford ...
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Parallel Visualization Algorithms: Performance and Architectural Implications
IEEE Computer, vol. 27,no. 7,1994 – MC
Recently, a new class of scalable, shared-address-space multiprocessors has emerged. Like message-passing machines, these multiprocessors have a distributed interconnection network and physically distributed main memory. However, they provide ...
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The performance advantages of integrating block data transfer in cache-coherent multiprocessors
ACM SIGOPS Operating Systems Review, vol. 28,no. 5,1994 – SIGOPS
Integrating support for block data transfer has become an important emphasis in recent cache-coherent shared address space multiprocessors. This paper examines the potential performance benefits of adding this support. A set of ambitious hardware ...
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Load balancing for multi-projector rendering systems
ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware, 1999 – HPG
Multi-projector systems are increasingly being used to provide large-scale and high-resolution displays for next-generation interactive 3D graphics applications, including large-scale data visualization, immersive virtual environments, and ...
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Characterizing the memory behavior of Java workloads: a structured view and opportunities for optimizations
ACM SIGMETRICS Performance Evaluation Review, vol. 29,no. 1,2001 – PER
This paper studies the memory behavior of important Java workloads used in benchmarking Java Virtual Machines (JVMs), based on instrumentation of both application and library code in a state-of-the-art JVM, and provides structured information about ...
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