IEEE Transactions on Computers
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Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures
IEEE Transactions on Computers, vol. 37,no. 8,1988
The authors describe the design, implementation, and evaluation of the Mach virtual-memory management system. The Mach virtual-memory system exhibits architecture independence, multiprocessor and distributed system support, and advanced ...
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On the Synthesis of Finite-State Machines from Samples of Their Behavior
IEEE Transactions on Computers, vol. 21,no. 6,1972
The Nerode realization technique for synthesizing finite-state machines from their associated right-invariant equivalence relations is modified to give a method for synthesizing machines from finite subsets of their input¿output behavior. The ...
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Algorithms for Reporting and Counting Geometric Intersections
IEEE Transactions on Computers, vol. 28,no. 9,1979
An interesting class of "geometric intersection problems" calls for dealing with the pairwise intersections among a set of N objects in the plane, These problems arise in many applications such as printed circuit design, architectural data ...
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Crash Recovery Scheme for a Memory-Resident Database System
IEEE Transactions on Computers, vol. 35,no. 9,1986
Database systems normally have been designed with the assumption that main memory is too small to hold the entire database. With the decreasing cost and increasing performance of semiconductor memories, future database systems may be constructed that ...
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On the Performance Enhancement of Paging Systems Through Program Analysis and Transformations
IEEE Transactions on Computers, vol. 30,no. 5,1981
It is possible to improve the paging performance of a program by applying transformations to the source program that improve data access locality. We discuss this subject in general terms, including automation of these transformations, and present a ...
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Distortion Invariant Object Recognition in the Dynamic Link Architecture
IEEE Transactions on Computers, vol. 42,no. 3,1993
An object recognition system based on the dynamic link architecture, an extension to classical artificial neural networks (ANNs), is presented. The dynamic link architecture exploits correlations in the fine-scale temporal structure of cellular ...
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On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication
IEEE Transactions on Computers, vol. 40,no. 2,1991
Lower-bound results on Boolean-function complexity under two different models are discussed. The first is an abstraction of tradeoffs between chip area and speed in very-large-scale-integrated (VLSI) circuits. The second is the ordered binary ...
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MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications
IEEE Transactions on Computers, vol. 49,no. 5,2000
Abstract—This paper introduces MorphoSys, a reconfigurable computing system developed to investigate the effectiveness of combining reconfigurable hardware with general-purpose processors for word-level, computation-intensive applications. ...
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Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques
IEEE Transactions on Computers, vol. 48,no. 11,1999
Abstract—Design parameters interact in complex ways in modern processors, especially because out-of-order issue and decoupling buffers allow latencies to be overlapped. Trade-offs among instruction-window size, branch-prediction accuracy, and ...
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